I am trying to use linux perf to profile cache performance.
perf list shows there is a cache-misses event. However, what’s the definition of this “cache-misses” event?
Is it one of L1D/L1i cache, L2 cache or L3 cache?
Thanks!
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Answer
The cache-misses
event corresponds to the misses in the last level cache (LLC). Note that this is an architectural performance monitoring event, that is supposed to behave consistently across microarchitectures.
This can be verified from the source code – cache-misses
The first 2 digits of the hexadecimal 0x412e refer to the umask(41) and the last 2 digits refer to the event-select(2e).
From the Intel software developer’s manual (look at the chapter on Performance Monitoring)
Last Level Cache Misses— Event select 2EH, Umask 41H
“This event counts each cache miss condition for references to the last level on-die cache. The event count may include speculation and cache line fills due to the first-level cache hardware prefetcher, but may exclude cache line fills due to other hardware-prefetchers.”