I have NXP/Free-scale Imx6 sabre lite development board. My task is to flash two OS kernels (Linux and RTOS)in such a way that linux runs on core0 and RTOS on core1. I have 1GB DDR3 in which i have to allocate first 128MB for RTOS and rest for LINUX image.
- How to configure U-boot in this case?
- core-0 should load Linux kernel in >128MB DDR3 area meanwhile core1 is in idle state at that time.
- core-0 should load RTOS and transfer control to core-1.
How can i achieve this scenario using u-boot ?
Please let me know if anyone have solved this!
Thanks in advance!
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Answer
Well this is possible but I don’t think uboot allow’s this with some exceptions. Some vendors provide modified uboot binaries with their boards that support such functionality. For example Xilinx provided u-boot for ZCU102 allows loading and bringing up of cortex-R cores from cortex-a53 cores present in the same SOC.
One of the famous Open source framework OpenAMP does this work. It allows remote’s life cycle management and also establishes communication between multiple OS running on different cores. But as far as I remember saber-lite is not supported currently.
Important in your case: In your case, you can simply follow these steps to get your work done.
Step1: Make sure the memory given to RTOS is not accesible to Linux. For this you will need to modify the dts file, the memory node to be exact.
Step2: Remove the devices from the dts that you want to access from RTOS. Don’t remove the important ones like GIC. RTOS will share it with linux without even it knowing. This is the only way I know of using GIC in an unsupervised environment. This also answers @AndrejsCainikovs question asked in the comments.
Step3: Modify bootargs from dts. Add nosmp flag in the bootargs in the dts.
Step4: Build the dts and replace the already placed dts in the boot partition of the SD-card.
Step5: In your GIC code comment our the reset and init code. Let the GIC be in what ever state it is in. Enable the cpu interface and those peripheral interrupts that you will be using and set their CPU affinity to RTOS core only. Now modify the linker file and build and link the RTOS code for the memory region that you just removed from linux memory region.
Step6: Copy the RTOS binary to boot partition of the SD-card.
Step7: Run the board and stop the u-boot at auto-boot. run the following command to load the RTOS image in memory.
fatload mmc 0:1 0x10000000 rtos.bin;
Obviously you will need to change load address as per your RTOS addresses and may be the mmc partition number.
Step8: Run the linux kernel using boot command and in the linux kernel you will need to play with some registers. I would choose to do it by writing a kernel driver and using ioremap to map those registers and access them. But its upto you how you do it, I am explaining here what needs to be done.
Write the RTOS start address in SRC_GPR3 register for core1 or in SRC_GPR5 for core2 or SRC_GPR7 for core3.
Now enable the core using SRC_SCR register’s 22nd 23rd and 24th bit for core1 core2 and core3 respectively, which ever you intend to run your RTOS on. Note that core0 can not be disabled or enabled.
Now bring the core out of reset using SRC_SCR register’s 13th 14th 15th and 16th bits for core0 core1 core2 and core3 respectively. Your RTOS will start running.
This overall configuration is formally called unsupervised systems as opposed to supervised systems that run hypervisor to do the strict resource partitioning. Here each OS runs with caution to not to touch any of the resources assigned to other OS.
You can find these registers memory addresses in i.MX 6Dual/6Quad Applications processor reference manual. Document Number: IMX6DQRM