I have a simple makefile that works correctly with gnu make, except the object file named ‘txt.o’ is not removed, using ‘rm tst.o’. Here is the text from the makefile.
# Make 'PPCBIN' variable set to folder that has the C library and binary files used # to compile to the correct target. PPCBIN = /binary_folder_here CC = $(PPCBIN)/gcc CFLAGS = -O3 -mpowerpc -Wa,-m603 LDFLAGS = -g tst : tst.o ${CC} ${LDFLAGS} -o tst tst.o tst.o : tst.c ${CC} -c ${CFLAGS} $< -o $@ # remove the temporary output file, 'tst.o'. clean: rm tst.o
Anyone know why the rm command here is not removing the ‘tst.o’ file?
Thanks,
Matt
Advertisement
Answer
What command did you enter for the make
?
If you just enter make
, it will choose the first target it finds. In this case, that target is tst
:
tst : tst.o ${CC} ${LDFLAGS} -o tst tst.o
The make will proceed according to the dependencies, so it will also make the target tst.o
if tst
is not up to date with it.
Your removal is the target clean
which, the way your makefile is structured, won’t be executed unless you enter:
make clean
If you want it to clean up after the build, include it in your target. One way you can do this is by creating a new target that makes and cleans. Make this your first target:
build_all: tst clean
Now, make
or make build_all
will build the tst
target then do clean
.
However, as was pointed out in the comments, there are good reasons to keep your .o
file around (e.g., not causing it to be rebuilt every time when not necessary).